ESD_Q1.pdf - Anonymous

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1. Which of the following statements is/are false with regards to cache? • cache increases the performance of a memory system • cache is slower than main memory • cache is smaller in size than the main memory • All of the mentioned 2. What is another way of writing the following line of code? • MOV PC, LR • MOV r14, r15 • MOV LR, r14 • None of the mentioned • MOV r15, r14 3. Which of the following statement is correct in regards to memory? • The faster, smaller memory are always closer to the processor • As we move away from the processor, speed increases • The memory that is farthest away from the processor is the costliest • None of the mentioned 4. The function of link register in ARM7TDMI is • Multiplex the address and data lines • To store address of I/O device • To store return address whenever subroutine is called • None of the mentioned 5. In the ARM Nomenclature ARM7TDMI, D and M stand for • Debug and Multiplier • Division and Modulation • Debug and Modulation • Division and Multiplier 6. Indicate whether the following instruction use ………. addressing modes. • STR r6, [r4, #4] • None of the mentioned • post-indexed • immediate • pre-indexed 7. ARM Processor core is a key component of ……. bit embedded system. • 8 • 16 • 32 • None of the mentioned 8. What is a microcontroller? • None of the mentioned • It is a microprocessor on a single chip without memory and I/O interfaces. • It is micro-programmed controller’s short form • It is a microprocessor along with memory and I/O interfaces on the same chip. 9. Which of the following is illegal? • ADD R1,R1,R2 • ADD R8,R9,#0x1F • ADD R5,R16,R3 • None of the mentioned 10. Which of the following statements is/are false? • In Hardvard architecture, separate busses for program memory and data memory • In Von Neumann architecture, shared bus between the program memory and data memory • In Von Neumann architecture, external busses for program memory and data memory • In Hardvard architecture, shared bus between the program memory and data memory 11. What is the order of the ARM7TDMI processor to execute the instruction? • Fetch -- Decode -- Execute • Decode -- Execute -- Fetch • Execute -- Decode -- Fetch • Decode -- Fetch -- Execute 12. Which ARM7TDMI processor mode is unprivileged mode? • FIQ • System • IRQ • User 13. What does "Embedded systems may simultaneously control some operations that run at slow rates and others that run at high rates" imply? • Real-time • Reactive • Single functioned • Multi-rate 14. Calculate the effective address of the following instruction if register r3 = 0x4000 and register r4 = 0x20. • STRH r9, [r3, r4] • 0x4000 • 0x4100 • 0x4020 • 0x4040 15. ARM7TDMI has …… operating states. • None of the mentioned • THUMB • ARM and THUMB • ARM 16. The locality of reference property justifies the use of • secondary memory • cache memory • main memory • register 17. On an ARM7TDMI, in any given mode, how many registers does a programmer see at one time? • 16 for User mode, 17 for remaining modes • 17 for User mode, 16 for remaining modes • 18 for User mode, 20 for remaining modes • 17 for User mode, 18 for remaining modes 18. What is the purpose of address bus? • to select a specified chip • to select a read/write cycle • to provide data to and from the chip • to select a location within the memory chip 19. A general-purpose microprocessor normally needs which of the following devices to be attached to it? • ROM • RAM • All of the mentioned • I/O 20. Pick the correct one • Not all embedded systems are real-time system • All real-time systems are embedded systems • Not all embedded systems are real-time system and all real-time systems are embedded systems • None of the mentioned 21. A Digital signal processor (DSP) is • General Purpose Processor (GPP) • Application Specific Integrated Processor (ASIP) • Application Specific Integrated Circuit (ASIC) • Field Programmable Gate Array (FGPA) 22. What mode does the processor have to be in to move the contents of the SPSR to the CPSR? • None of the mentioned • Unprivileged mode • Any privileged mode • User mode 23. If an ARM7TDMI processor encounters an undefined instruction, from what address will it begin fetching instructions after it changes to Undefined mode? • 0x00000008 • 0x0000000C • 0x00000004 • 0x00000000 24. Which of the following statement is false? • DRAM is faster as compared to SRAM • All of the mentioned • DRAM requires less power than SRAM • SRAM is faster as compared to DRAM 25. How many external interrupt lines does the ARM7TDMI have? • 4 • 8 • 6 • 2