An Introduction to Assembly Programming with RISC-V Prof. Edson Borin Institute of Computing Unicamp 1 st edition An Introduction to Assembly Programming with RISC-V 2 Cop yrigh t c 2021 Edson Borin All rights reserved. This b o ok or any p ortion thereof ma y not b e repro duced or used in any manner whatso ev er without the express written p ermission of the author except for the use of brief quotation in a b ook review. ISBN:978-65-00-15811-3 First edition 2021 Edson Borin Institute of Computing - Univ ersit y of Campinas Av. Alb ert Einstein, 1251 Cidade Univ ersit ́ aria Zeferino V az Bar ̃ ao Geraldo - Campinas - SP - Brasil www.ic.unicamp.br/ ~ edson 13083-852 An up dated version of this b ook and other material may b e a v ailable at: www.riscv- programming.org 3 F orew ord This b ook fo cuses on teac hing the art of programming in assembly language, using the RISC-V ISA as the guiding example. T o w ards this goal, the text spans, at an in tro ductory lev el, the organization of computing systems, describ es the mechanics of ho w programs are created and in tro duces basic programming concepts including both user lev el and system programming. The abilit y to read and write co de in low-lev el assem bly language is a p o werful skill to b e able to create high p erformance programs, and to access features of the machine that are not easily accessible from high-level languages suc h as C, Ja v a or Python, for example to con trol p eripheral devices. The b ook in tro duces the organization of computing systems, and the mechan- ics of creating programs and conv erting them to machine-readable format suitable for execution. It also teac hes the comp onen ts of a program, or how a programmer comm unicates her inten t to the system via directives, data allo cation primitives and fi nally the ISA instructions, and their use. Basic programming concepts of control fl o w, lo ops as well as the runtime stack are introduced. Next the b o ok describ es the organization of co de sequences into routines and subroutines, to comp ose a program. The text also addresses issues related to sys tem programming, including notions of p eripheral control and interrupts. This text, and ancillary teaching materials, has b een used in introductory classes at the Universit y of Campinas, Brazil (UNICAMP) and has undergone re fi nement and impro v emen t for sev eral editions. Mauricio Breternitz Principal In v estigator & In vited Asso ciate Professor IST AR ISCTE Lab oratory ISCTE Instituto Univ ersitario de Lisb oa Lisb on, Portugal 4 Notices: • Do cument version: Ma y 9, 2022 • Please, rep ort t yp os and other issues to Prof. Edson Borin ( edson@ic.unicamp. br ). 5 Con ten ts F orew ord 4 Glossary 11 Acron yms 14 I In tro duction to computer systems and assem bly language 1 1 Execution of programs: a 10,000 ft o verview 2 1.1 Main comp onen ts of computers 2 1.1.1 The main memory 3 1.1.2 The CPU 3 1.2 Executing program instructions 4 1.3 The b oot pro cess 5 2 Data representation on mo dern computers 6 2.1 Numeral Systems and the P ositional Notation 6 2.1.1 Con v erting n um b ers b et ween bases 8 2.2 Represen ting n um b ers on computers 11 2.2.1 Unsigned n um b ers 11 2.2.2 Signed n um b ers 12 2.2.3 Binary arithmetic and Ov er fl o w 14 2.2.4 In teger Ov er fl o w 15 2.3 Represen ting text 16 2.4 Organizing data on the memory 18 2.4.1 T exts on the main memory 18 2.4.2 Num b ers on the main memory 19 2.4.3 Arra ys on the main memory . 19 2.4.4 Structs on the main memory 21 2.5 Enco ding instructions 22 3 Assem bly , ob ject, and executable fi les 24 3.1 Generating nativ e programs 24 3.1.1 Insp ecting the conten ts of ob ject and executable fi les 26 3.2 Lab els, symbols, references, and relo cation 27 3.2.1 Lab els and symbols 27 3.2.2 References to lab els and relo cation 28 3.2.3 Unde fi ned references 30 3.2.4 Global vs lo cal symbols 31 3.2.5 The program en try p oin t 32 3.3 Program sections 33 3.4 Executable vs ob ject fi les 36 6 4 Assem bly language 37 4.1 Commen ts 39 4.2 Assem bly instructions 39 4.3 Immediate v alues 40 4.4 Sym b ol names 40 4.5 Lab els 41 4.6 The lo cation counter and the assembling pro cess 42 4.7 Assem bly directiv es . 44 4.7.1 Adding v alues to the program 44 4.7.2 The directiv e 46 .section 4.7.3 Allo cating v ariables on the section 47 .bss 4.7.4 The and directiv es 48 .set .equ 4.7.5 The directiv e 49 .globl 4.7.6 The directiv e 49 .align I I User-lev el programming 51 5 In tro duction 52 6 The R V32I ISA 53 6.1 Datat yp es and memory organization 54 6.2 R V32I registers 55 6.3 Load/Store arc hitecture 55 6.4 Pseudo-instructions 56 6.5 Logic, shift, and arithmetic instructions 56 6.5.1 Instructions syn tax and op erands 57 6.5.2 Dealing with large immediate v alues 57 6.5.3 Logic instructions 58 6.5.4 Shift instructions 59 6.5.5 Arithmetic instructions 61 6.6 Data mo v emen t instructions 63 6.6.1 Load instructions 63 6.6.2 Store instructions . 67 6.6.3 Data mo v emen t pseudo-instructions 68 6.7 Con trol- fl o w instructions 69 6.7.1 Conditional con trol- fl o w instructions 69 6.7.2 Direct vs indirect con trol- fl o w instructions 71 6.7.3 Unconditional con trol- fl o w instructions 72 6.7.4 System Calls 73 6.8 Conditional set instructions 74 6.9 Detecting o v er fl o w 74 6.10 Arithmetic on multi-w ord v ariables 75 7 Con trolling the execution fl o w 77 7.1 Conditional statemen ts . 77 7.1.1 statemen ts 77 if-then 7.1.2 Comparing signed vs unsigned v ariables 77 7.1.3 statemen ts 78 if-then-else 7.1.4 Handling non-trivial b oolean expressions 79 7.1.5 Nested if statemen ts 80 7.2 Rep etition statements 81 7.2.1 lo op 81 while 7.2.2 lo op 81 do-while 7.2.3 lo op 82 for 7.2.4 Hoisting lo op-in v ariant co de 83 7.3 In v oking and returning from routines 83 7.3.1 Returning v alues from functions 84 7.4 Examples 85 7 7.4.1 Searc hing for the maxim um v alue on an arra y 85 8 Implemen ting routines 87 8.1 The program memory la y out 87 8.2 The program stac k 87 8.2.1 T yp es of stacks 90 8.3 The ABI and soft w are comp osition 91 8.4 P assing parameters to and returning v alues from routines 91 8.4.1 P assing parameters to routines 91 8.4.2 Returning v alues from routines 93 8.5 V alue and reference parameters 93 8.6 Global vs lo cal v ariables 95 8.6.1 Allo cating lo cal v ariables on memory 96 8.7 Register usage p olicies 98 8.7.1 Caller-sa v ed vs Callee-sa v ed registers 99 8.7.2 Sa ving and restoring the return address 100 8.8 Stac k F rames and the F rame P oin ter 100 8.8.1 Stac k F rames 100 8.8.2 The F rame P oin ter 101 8.8.3 Keeping the stac k p oin ter aligned 102 8.9 Implemen ting RISC-V compatible routines 102 ilp32 8.10 Examples 103 8.10.1 Recursive routines 103 8.10.2 The standard “C” library syscall routines 104 I I I System-lev el programming 106 9 Accessing p eripherals 107 9.1 P eripherals 107 9.2 In teracting with p eripherals 108 9.2.1 P ort-mapp ed I/O 109 9.2.2 Memory-mapp ed I/O 110 9.3 I/O op erations on RISC-V 111 9.4 Busy w aiting 112 10 External Interrupts 114 10.1 Introduction 114 10.1.1 Polling . 116 10.2 External Interrupts 116 10.2.1 Detecting external in terrupts 117 10.2.2 Inv oking the prop er interrupt service routine 118 10.3 Interrupts on R V32I 120 10.3.1 Control and Status Registers 120 10.3.2 Interrupt related Control and Status Registers 121 10.3.3 Interrupt Handling Flow 122 10.3.4 Implementing an interrupt service routine 123 10.3.5 Setting up the In terrupt Handling Mec hanism 124 11 Softw are In terrupts and Exceptions 127 11.1 Privilege Levels 127 11.2 Protecting the system 128 11.3 Exceptions 128 11.4 Softw are Interrupts 129 11.5 Protecting RISC-V systems 130 11.5.1 Changing the privilege mo de 130 11.5.2 Con fi guring the exception and soft w are in terrupt mechanisms 131 11.5.3 Handling illegal op erations 131 11.5.4 Handling system calls 132 8 A R V32IM ISA reference card 134 9 10 Glossary 32-bit address space is set of addresses represen ted b y 32-bit unsigned num b ers. 10, 54 binary digit is a digit that ma y assume one of tw o v alues: “0” (zero) or “1” (one). 10, 11, 14 bus is a communication system that transfers information b et ween the computer comp onen ts. This system is usually comp osed of wires that are resp onsible for transmitting the information and asso ciated circuitry , which are resp onsible for orc hestrating the comm unication. 3, 10, 107–109, 112 b yte addressable memory is a memory in which each memory w ord stores a single b yte. 3–5, 10, 18–21, 23, 54 Cen tral Pro cessing Unit , or CPU, is the computer comp onen t resp onsible for executing the computer programs. 2, 3, 10, 13 column-ma jor order sp eci fi es that the elements of a tw o-dimensional array are organized in memory column b y column. In this context, the elements of the fi rst column are placed fi rst then the elements of the second column are placed after the elemen ts of the fi rst one and so on. 10 Con trol and Status Register , or CSR, is an internal CPU register that exp oses the CPU status to the softw are and allow soft ware to control the CPU. 10, 120, 121, 129, 131 endianness refers to the order in whic h the bytes are stored on a computing system. There are tw o common formats: little-endian and big-endian. The little-endian format places the least signi fi can t byte on the memory p osition asso ciated with the lo west address while the big-endian format places the most signi fi cant byte on the memory p osition asso ciated with the highest address. 10, 19, 46, 64–67 exceptions are even ts generated by the CPU in resp onse to exceptional conditions when executing instructions. 10 external interrupts are interrupts caused by external (non-CPU) hardware, such as p eripherals, to inform the CPU they require attention. 10 hardw are interrupts are even ts generated by hardware, such as p eripherals, to inform the CPU they require atten tion. 10 immediate v alue is a num b er that is enco ded into the instruction enco ding. As a consequence, it is a constan t. 10, 57–69, 72, 135 Instruction Set Architecture de fi nes the computer instructions set, including, but not limited to, the b eha vior of the instructions, their enco ding, and resources that may b e accessed b y the instructions, such as CPU registers. 4, 10, 49, 53, 54, 56, 60, 62, 64–67, 70–72, 74, 75, 84, 120, 127, 128 11 in teger ov er fl ow o ccurs when the result of an arithmetic op eration on tw o integer m-bit binary num b ers is outside of the range that can b e represen ted by an m-bit binary n um b er. 10, 15, 16 in terrupt service routine , or ISR, is a softw are routine that handles in terrupts. It is also no wn as in terrupt handler. 10, 117, 118, 121–125, 128, 129, 131, 132 in terrupt vector table is a table that maps interrupt/exception identi fi ers to rou- tines that m ust b e in v ok ed to handle the interrupt/exception. The in terrupt v ector table is usually stored in main memory and accessed b y the CPU hard- w are to inv oke the prop er routine when handling an interrupt/exception. 10, 131 ISA native datatype is a datat yp e that can be naturally processed by the ISA. 10, 54, 64 load instruction is an instruction that loads a v alue from main memory into a register. 10, 56 Load/Store architecture is a computer architecture that requires v alues to b e loaded/stored explicitly from/to main memory b efore op erating on them. 10, 55, 56 mac hine language is a low-lev el language that can b e directly pro cessed b y the computer’s cen tral pro cessing unit (CPU). 10, 25, 26 main memory is a storage device used to store the instructions and data of pro- grams that are b eing executed. 2–5, 10, 12, 18, 20, 21, 23, 27, 32, 33, 35, 36, 48, 107–112, 114–119, 123–125, 128 nativ e program is a program enco ded using instructions that can b e directly exe- cuted b y the CPU, without help from an emulator or a virtual machine. 2, 10, 24, 26 n umeral system is a system used for expressing num b ers. 6–12 op code the op code, or op eration co de, is a co de (usually enco ded as a binary num- b er) that indicates the op eration that an instruction must p erform. 10, 57 p eripherals are input/output, or I/O, devices that are connected to the computer. Examples of p eripheral devices include video cards (also known as graphics cards), USB con trollers, net w ork cards, 2, 10, 107 etc. p ersisten t storage is a storage device capable of preserving its conten ts when the p o wer is shut down. Hard disk drives (HDDs), solid state driv es (SSDs), and fl ash driv es are example of p ersisten t storage devices. 2, 3, 10, 107 p ositional n umeral system is a numeral system in which the v alue of a digit d i dep ends on the its p osition on the sequence. 7, 8, 10, 11 privilege level de fi nes whic h ISA resources are accessible b y the softw are b eing ex- ecuted. 10, 120, 127, 128 privilege mo de de fi nes the privilege level for the curren tly executing soft ware. 10, 13, 128–131 program counter or PC, is the register that holds the address of the next instruc- tion to be executed. In other words, it holds the address of the memory p osition that con tains the next instruction to b e executed. It is also kno wn as instruction p oin ter, or IP , in some computer architectures. 10, 55 12 pseudo-instruction is an assembly instruction that do es not hav e a corresp onding mac hine instruction on the ISA, but can b e translated automatically b y the assem bler into one, or more, alternative machine instructions to achiev e the same e ff ect. 10, 39, 40, 56, 58, 68, 69 register is a small memory device usually lo cated inside the Cen tral Pro cessing Unit (CPU) for quic k read and write access. 3, 10 ro w-ma jor order sp eci fi es that the elements of a t w o-dimensional arra y are orga- nized in memory row by row. In this con text, the elemen ts of the fi rst row are placed fi rst then the elements of the second row are placed after the elemen ts of the fi rst one and so on. 10, 21 stac k p oin ter is a p oin ter that p oints to the top of the program stack. In other w ords, it holds the address of the top of the program stack. In RISC-V, the stac k p oin ter is stored by the register.. 10 sp store instruction is an instruction that stores v alues into main memory 10 unprivileged ISA is the sub-set of the ISA that is accessible b y the softw are running on unprivileged mo de. 10, 55, 128 unprivileged mo de is the privilege mo de with least privileges. In RISC-V, it is the User/Application privilege mo de. 10, 13, 128 unprivileged registers are a set of registers accessible on the unprivileged mo de. 10, 55 user application is an application designed to be executed at user-mode on a system managed b y an op erating system. 10 user-mo de on RISC-V, the user-mo de is equiv alent to the User/Application mo de. 10, 13, 128 13 Acron yms ABI Application Binary Interface. 10, 54, 84, 91–94, 99, 102, 103, 125 ASCI I American Standard Co de for Information Interc hange. 10, 16–18 bit Binary digit. 2–5, 10–20, 22, 23, 25, 28, 29, 35, 37, 40, 44–46, 48–50, 102, 108–114, 120, 121, 125 CPU Central Processing Unit. 2–5, 10–13, 32, 36, 49, 52, 107–112, 114–125, 128–132 CSR Control and Status Register. 10, 120–125, 129–132 ISA Instruction Set Architecture. 4, 10, 13, 24–26, 38–40, 49, 50, 55, 109–111, 120, 124, 125, 128, 129 ISR Interrupt Service Routine. 10, 117–120, 124, 125 PC Program Counter. 4, 5, 10, 27, 32, 117, 121–124, 129, 131 UTF-8 Universal Co ded Character Set (or Unico de) T ransformation F ormat - 8-bit. 10, 16–18 14 Part I In tro duction to computer systems and assem bly language 1 Chapter 1 Execution of programs: a 10,000 ft o v erview There are several wa ys of enco ding a computer program. Some programs, for ex- ample, are enco ded using abstract instruction sets and are executed by emulators or virtual machines, which are other programs designed to interpret and execute the abstract instruction set. Bash scripts, Ja v a byte-code programs, and Python scripts are common examples of programs that are enco ded using abstract instruction sets and require an em ulator or a virtual mac hine to supp ort their execution. A nativ e program is a program enco ded using instructions that can b e directly executed by the computer hardware, without help from an em ulator or a virtual machine In this b ook, we fo cus our discussion on native programs. Hence, from now on, whenever we use the term “program”, unless stated otherwise, w e are referring to nativ e programs. Nativ e program instructions usually p erform simple op erations, such as adding or comparing tw o n umbers, nonetheless, b y executing m ultiple instructions, a computer is capable of solving complex problems. Most mo dern computers are built using digital electronic circuitry These machines usually represent information using voltage levels that are mapp ed to tw o states, HIGH and LOW, or “1” (one) and “0” (zero). Hence, the basic unit of information on mo dern computers is a binary digit, , “1” or “0”. Consequently , information i.e. and instructions are enco ded as sequences of nary digi s, or s. bi t bit 1.1 Main comp onen ts of computers Computers are usually comp osed of the following main comp onen ts: • Main memory : The main memory is used to store the instructions and data of programs that are b eing executed. The main memory is usually volatile, hence, if the computer is turned o ff , its con ten ts are lost. • Central Pro cessing Unit : the Central Pro cessing Unit, or CPU, is the com- p onen t responsible for executing the computer programs. The CPU retriev es programs’ instructions from the main memory for execution. Also, when execut- ing instructions, the CPU often reads/writes data from/to the main memory. • Persisten t storage : Since the main memory is v olatile, there is usually a p ersisten t storage device to preserve the programs and data when the p o w er is sh ut down. Hard disk drives (HDDs), solid state drives (SSDs), and fl ash drives are example of p ersisten t storage devices. • Peripherals : P eripherals are input/output, or I/O, devices that are connected to the computer. Examples of p eripheral devices include video cards (also known as graphics cards), USB con trollers, net w ork cards, etc. 2 1.1. MAIN COMPONENTS OF COMPUTERS • Bus : The bus is a communication system that transfers information b et ween the computer comp onen ts. This system is usually comp osed of wires that are resp onsible for transmitting the information and asso ciated circuitries, which orc hestrate the comm unication. Figure 1.1 illustrates a computer system in which the CPU, the main memory, a p ersisten t storage device (HDD) and tw o I/O devices are connected through a system bus. bus CPU Main Memory Output device Input device HDD Figure 1.1: Computer system comp onents connected through a system bus. 1.1.1 The main memory The computer main memory is a storage device used to store the program instructions and data, and it is composed of a set of memory w ords. Each memory w ord is capable of storing a set of bits (usually eigh t bits) and is iden ti fi ed by a unique n umber, known as the memory word address. A byte addressable memory is a memory in which each memory w ord (a.k.a. memory lo cation) stores a single byte and is asso ciated with a unique address. Figure 1.2 illustrates the organization of a byte addressable memory. Notice that the memory word identi fi ed b y address 5 (or simply “memory word 5”) con tains the v alue 11111111 2 while memory w ord 0 con tains the v alue 00110110 2 0 00110110 1 00000000 2 00001000 3 10000000 4 11110000 5 11111111 6 00001111 7 11100001 ... ... Memory locations 1 byte Addre sses (a) 0 36 1 00 2 08 3 80 4 F0 5 FF 6 0F 7 E1 ... ... Memory locations 1 byte Addre sses (b) Figure 1.2: Organization of a byte addressable memory with its conten ts represented in the binary (a) and the hexadecimal (b) bases. 1.1.2 The CPU The Cen tral Pro cessing Unit is the comp onent resp onsible for executing the computer programs. There are several wa ys of implementing and organizing a CPU, how ever, to understand how programs are executed, it su ffi ces to know that the CPU contains: • Registers : a CPU register is a small memory device lo cated inside the CPU. The CPU usually contains a small set of registers. RISC-V pro cessors, for ex- ample, contain thirt y-one 32-bit registers 1 that can b e used b y programs to store information inside the CPU. Computers often con tain instructions that 1 A 32-bit register is a register that is capable of storing 32 bits, , v alues composed of 32 bits. i.e. http://riscv- programming.org (V ersion: Ma y 9, 2022) 3 CHAPTER 1. EXECUTION OF PROGRAMS: A 10,000 FT OVER VIEW cop y v alues from the main memory in to CPU registers, known as “load” in- structions, and instructions that cop y v alues from the CPU registers in to the main memory , kno wn as “store” instructions. • A datapath : the CPU datapath is resp onsible for p erforming op erations, such as arithmetic and logic op erations, on data. The datapath usually p erforms the op eration using data from the CPU registers and store the results on CPU registers. • A control unit : the control unit is the unit resp onsible for orchestrating the computer op eration. It is capable of controlling the datapath and other comp o- nen ts, such as the main memory, b y sending commands through the bus. F or example, it may send a sequence of commands to the datapath and to the main memory to orc hestrate the execution of a program instruction. Accessing data on registers is muc h faster than accessing data on the main memory. Hence, programs tend to copy data from memory and keep them on CPU registers to enable faster pro cessing. Once the data is no longer needed, it may b e discarded or sa v ed bac k on the main memory to free CPU registers. The Instruction Set Arc hitecture, or ISA, de fi nes the computer instructions set, including, but not limited to, the b eha vior of the instructions, their enco ding, and resources that may be accessed b y the instructions, such as CPU registers. A program that w as generated for a given ISA can be executed by an y computer that implemen ts a compatible ISA. ISAs tend to ev olv e ov er time, how ever, ISA designers try to keep newer ISA v ersions compatible with previous ones so that legacy co de, , co de generated for i.e. previous versions of the ISA, can still b e executed by newer CPUs. F or example, a program that was generated for the 80386 ISA can b e executed by an y pro cessor that implemen ts this or an y other compatible ISAs, suc h as the 80486 ISA. 1.2 Executing program instructions As discussed previously , mo dern computers usually store the program that is b eing executed on main memory, including its instructions and data. The CPU retrieves programs’ instructions from the main memory for execution. Also, when executing instructions, the CPU may read/write data from/to the main memory. T o illustrate this pro cess we will consider a CPU that implements the R V32I ISA. The R V32I ISA sp eci fi es that instructions are enco ded using 32 bits. Hence, assuming the system has a byte addressable memory 2 , each instruction o ccupies four memory words. Also, it sp eci fi es that instructions are executed sequen tially 3 , in the same order they app ear in the main memory. Let us consider a small program generated for the R V32I ISA that is comp osed of three instructions and is stored in main memory starting at address 8000. Since each instruction occupies four bytes ( , 32 bits) and instructions are stored consecutiv ely i.e. on main memory, the fi rst instruction is lo cated at addresses 8000, 8001, 8002, and 8003, the second one on addresses 8004, 8005, 8006, and 8007, and the third one on addresses 8008, 8009, 800A, and 800B. Figure 1.3 illustrates the instructions stored on the main memory. The CPU usually con tains a register to k eep trac k of the next instruction that needs to b e executed. This register, called Program Coun ter, or PC, on the R V32 ISA, stores the starting address of the sequence of memory w ords that store the next instruction to b e executed. F or example, b efore executing the fi rst instruction of the co de illustrated at Figure 1.3, the PC c on tains the v alue 8000. Once the instruction stored at address 8000 is fetched, the v alue of the PC is up dated by adding four to its con ten ts so that the next instruction (at address 8004) can b e fetc hed for execution once the current instruction is completed. Algorithm 1 illustrates the execution cycle 2 This is usually the case in modern computers. 3 As discussed in Section 6.7, control- fl o w instructions may c hange the normal execution fl ow. http://riscv- programming.org (V ersion: May 9, 2022) 4 1.3. THE BOOT PROCESS Memory words Address ... ... 0001001 1 2 8000 00000101 2 8001 00010101 2 8002 00000000 2 8003 1001001 1 2 8004 10000101 2 8005 1 1 1 10101 2 8006 1 1 1 11 11 1 2 8007 1 1 10001 1 2 8008 00001 100 2 8009 101 10101 2 800A 1 1 1 11 110 2 800B ... ... loop: addi a0, a0, 1 addi a1, a1, -1 beq a0, a1, loop Assembly language (R V32I) Figure 1.3: Three R V32I instructions stored on a b yte addressable memory starting at address 8000. p erformed by a simple R V32I CPU. First, the CPU uses the address in the PC to fetc h an instruction (a sequence of four memory w ords, , 32 bits) from main memory i.e. and store it on an internal register called Then, it up dates the PC so it p oin ts to IR the next instruction in memory Finally , it executes the instruction that was fetched from memory Notice that when executing the instruction, the CPU may also access the main memory to retriev e or store data. Algorithm 1: R V32I instructions execution cycle. 1 while T rue do 2 // F etc h instruction and up date PC ; 3 IR PC ← MainMemory[ ] ; 4 PC PC ← +4; 5 ExecuteInstruction( ); IR 6 end T o execute a program, the operating system essentially loads the program in to the main memory ( , from a p ersisten t storage device) and sets the PC so it p oin ts to e.g. the program en try p oin t. 1.3 The b o ot pro cess Since the main memory is volatile, whenever a computer is p o wered on, it contains garbage. As a consequence, at this p oin t, the CPU ma y not retriev e instructions from the main memory. In this context, on p o wer on, the PC is automatically set so that the CPU starts b y retrieving instructions from a small non-volatile memory device, whic h stores a small program that performs the b oot pro cess 4 This program sets up the basic computer comp onen ts, chec ks the b oot con fi guration (also stored on a non- v olatile memory), and, based on its settings, loads into main memory the op erating system b oot loader from a p ersisten t storage device ( , the hard disk drive). e.g. Once the op erating system b oot loader is loaded into memory , the CPU starts executing its co de, which, in turn, fi nishes setting up the computer and loading the primary op erating system mo dules into the main memory. Once the b oot pro cess fi nishes, a copy of the primary op erating system mo dules is lo cated in the main memory, and the system is ready to execute other programs, such as users’ programs. 4 In old p ersonal computer systems this program is known as the Basic Input/Output System, or BIOS. More mo dern computers use the Uni fi ed Extensible Firmw are Interface, or UEFI, standard. http://riscv- programming.org (V ersion: Ma y 9, 2022) 5 Chapter 2 Data representation on mo dern computers This chapter discusses how information is represented on computers. First, Section 2.1 in tro duces the concepts of numeral systems and the positional notation. Then, sec- tions 2.2 and 2.3 discuss how n um b ers and text are represen ted on computers, resp ec- tiv ely Next, Section 2.4 shows how data is organized in memory Finally , Section 2.5 discusses ho w instructions are enco ded. 2.1 Numeral Systems and the P ositional Notation A numeral system is a system used for expressing n umbers The numeral system de fi nes a set of sym b ols and rules for using them to represent a given set of n um b ers ( , the natural num b ers). F or example, the “unary numeral system”, is e.g. a numeral system in which every natural num b er is represen ted by a corresp onding n um b er of symbols. In this system, assuming the base symbol is the character, ? natural num b ers one, tw o, and fi ve would b e represen ted as , , and , ? ?? ? ? ? ? ? resp ectiv ely The “decimal numeral system” is the most common numeral system used by h u- mans to represen t in teger and non-in teger n um b ers. Let: • D 10 b e the set of symbols used in the decimal numeral system, , i.e. D 10 = { } “0” “1” “2” “3” “4” “5” “6” “7” “8” “9” , , , , , , , , , ; and • d i b e a digit on a num b er represented in the decimal n umeral system, , i.e. d i ∈ D 10 ; • number 10 b e a num b er represented in the decimal numeral system; an y natural n umber may b e represented on the decimal numeral system by an ordered sequence of digits, as illustrated by Equation 2.1. The sup erscript anno- m tation indicates the digit p osition. Notice that the rightmost digit is asso ciated with p osition 0 and the leftmost digit is asso ciated with p osition 1. m − number 10 = d m − 1 d m − 2 · · · d 1 d 0 10 (2.1) F or example, the num b er one thousand nine h undred and sixty nine is represen ted b y the sequence 1969. In this case, = 4, m d 3 = “1”, d 2 = “9”, d 1 = “6”, and d 0 = “9” Let: • sy mbol v alue d ( i ) b e the v alue of the symbol used in digit d i ; and • sy mbol v alue sy mbol v alue sy mbol v alue (“0”) = zero, (“1”) = one, (“2”) = tw o, ..., (“9”) = nine; sy mbol v alue 6