R.M.D. ENGINEERING COLLEGE (An Autonomous Institution) Approved by AICTE, New Delhi & Affiliated to Anna University, Chennai R.S.M. Nagar, Kavaraipettai, Gummidipoondi Taluk, Tiruvallur District-601 206 DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING 24EC301 ANALOG CIRCUITS ( L A B I N T E G R A T E D ) LAB MANUAL - [2025-2026] Prepared By: 1. Dr. S.G.Hymlin Rose – Associate Professor 2. Ms. S.Gayathri Priya -Assistant Professor HARDWARE EXPERIMENTS S.NO DATE LIST OF EXPERIMENTS Page No Marks Signature 1. Design of BJT amplifier with Fixed bias 2. Analysis of JFET with Voltage divider bias using PSPICE 3. Design and analysis of frequency response of Common emitter amplifier 4. Design of Class B Power Amplifier 5. Simulation of Class A Amplifier using PSPICE 6. Simulation of Darlington Amplifier using PSPICE 7. Design and Implementation of a Current Series (Series - Series) Feedback Amplifier 8. Simulation of feedback in voltage shunt (Shunt-shunt) feedback amplifier using PSPICE 9. Design of RC phase shift oscillator 10. Simulation of Hartley/Colpitts Oscillator using PSPICE Content Beyond Syllabus 1. Voltage shunt feedback amplifier 2. Twin T Oscillator RMDEC Vision RMDEC aspires to be a premier institution offering quality technical education and research with application expertise in Engineering and Technology. RMDEC Mission Develop the students as outstanding professionals by creating an environment that would nurture creativity, academic excellence, professionalism, high standard of ethics, sense of responsibility and respect for individuals. Provide an efficient academic and research environment. Interact with corporates, industries and research institutions to work on collaborative projects and sponsored research. Establish centers of excellence to impart Domain Specific industry skills. Encourage the faculty to excel in their teaching and research careers. Contribute more to the education and training of rural folk as societal obligation. Department Vision To offer effective technical education to contribute to the global industrial development and socio-economic wellbeing of competent Electronics and Communication Engineers. Department Mission The department of Electronics and Communication Engineering endeavors to provide professionally competent ECE engineers to the country by having mission: To produce competent engineers to face challenges of the society by providing conducive academic learning environment. To facilitate and encourage the students and faculty members to excel in research activities. To promote industry institute collaboration and develop the application skills of the students. To adopt innovative teaching and learning methodologies that leads to self improvement of students. To develop sound technical knowledge, professional ethics, entrepreneurial and leadership skills among students. Program Educational Objectives (PEO) Graduates of Electronics and Communication Engineering program will PEO I: Develop solutions to the real-world problems in various areas of Electronics and Communication Engineering. PEO II: Adapt to the latest trends in technology through self-learning in the areas of design, analysis, and synthesis of Engineering Systems. PEO III: Exhibit leadership skills and enhance their abilities through lifelong learning. PEO IV: Carry out their profession with ethics, integrity, competency and social responsibility. PROGRAM OUTCOMES (POs) PO 1. Engineering Knowledge: Apply the knowledge of mathematics, science, engineering fundamentals, and an engineering specialization to the solution of complex engineering problems. PO 2. Problem Analysis: Identify, formulate, review research literature, and analyze complex engineering problems reaching substantiated conclusions using first principles of mathematics, natural sciences, and engineering sciences. PO 3. Design/Development of solutions: Design solutions for complex engineering problems and design system components or processes that meet the specified needs with appropriate consideration for the public health and safety, and the cultural, societal, and environmental considerations. PO 4. Conduct investigations of complex problems: Use research-based knowledge and research methods including design of experiments, analysis and interpretation of data, and synthesis of the information to provide valid conclusions. PO 5. Modern Tool Usage: Create, select, and apply appropriate techniques, resources, and modern Engineering and IT tools including prediction and modeling to complex engineering activities with an understanding of the limitations. PO 6. The Engineer and Society: Apply reasoning informed by the contextual knowledge to assess societal, health, safety, legal and cultural issues and the consequent responsibilities relevant to the professional engineering practice. PO 7. Environment and Sustainability: Understand the impact of the professional engineering solutions in societal and environmental contexts, and demonstrate the knowledge of, and need for sustainable development. PO 8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and norms of the engineering practice. PO 9. Individual and Team Work: Function effectively as an individual, and as a member or leader in diverse teams, and in multidisciplinary settings. PO 10. Communication: Communicate effectively on complex engineering activities with the engineering community and with society at large, such as, being able to comprehend and write effective reports and design documentation, make effective presentations, and give and receive clear instructions. PO 11. Project Management and Finance: Demonstrate knowledge and understanding of the engineering and management principles and apply these to one’s own work, as a member and leader in a team, to manage projects and in multidisciplinary environments. PO 12. Life-long Learning: Recognize the need for, and have the preparation and ability to engage in independent and life- long learning in the broadest context of technological change. PROGRAMME SPECIFIC OUTCOMES (PSOs) PSO 1 To analyze, design and develop solutions by applying foundational concepts of Electronics and Communication Engineering. PSO 2 To apply design principles and best practices for developing quality products for scientific and business applications. PSO 3 To adapt emerging information and communication technologies (ICT) and innovate ideas and solutions to existing/novel problems COURSE CODE COURSE TITLE L T P C 24EC301 ANALOG CIRCUITS (Theory Course with laboratory component) 3 0 2 4 UNIT I BJT and FET Biasing 9+6 Bias Stability: Need for biasing - Load line analysis: DC Load Line, AC load line - BJT Biasing methods and basic stability: Fixed Bias, Voltage Divider bias- JFET Biasing: Fixed Bias, S elf Bias, Voltage divider Bias. List ofExperiments: 1. Design of BJT amplifier with Fixed bias. 2. Analysis of JFET with Voltage divider bias using PSPICE UNIT II Analysis of BJT Amplifier 9+3 Transistor Hybrid model - Analysis of Common emitter amplifier using h parameters, Millers Theorem, Analysis of common emitter amplifier using pi model-Frequencyresponse of BJT, Common emitter short circuit current gain –cut off frequencies and unity gain. List of Experiments: 3. Design and analysis of frequency response of Common emitter amplifier UNIT III Multistage BJT Amplifiers and Large Signal Amplifier 9+9 Multistage amplifier: Cascade Amplifier- Darlington amplifier - Cascode amplifier, Large Signal Amplifier: Classification, quantitative analysis, comparison of Class A-Class B-Class AB, Class C power amplifier. List ofExperiments: 4. Design of Class B Power Amplifier 5. Simulation of Class A Amplifier using PSPICE 6. Simulation of Darlington Amplifier using PSPICE UNIT IV Feedback Amplifiers 9+6 Classification of Amplifiers-Feedback concept – Transfer gain with feedback- Characteristics of negative feedback amplifiers, Topologies -Method of analysis of series-series, series-shunt, shunt-shunt and shunt- series feedback amplifiers. List ofExperiments: 7. Design and Implementation of a Current Series (Series-Series) Feedback Amplifier. 8. Simulation of feedback in voltage shunt (Shunt-shunt) feedback amplifier using PSPICE UNIT V Oscillators 9+6 Basic Principles of oscillation- Barkhausen criterion, RC phase shift oscillators, Wien bridge oscillator, LC oscillators: Colpitts, Hartley, Clapp Oscillator, crystal oscillators, UJT relaxation oscillator List ofExperiments: 9. Design of RC phase shift oscillator 10. Simulation of Hartley/Colpitts Oscillator using PSPICE TOTAL:45Theory+30Lab=75PERIODS COURSE OUTCOMES: Upon completion of the course the students will be able to: CO1: Explain different biasing methods for BJT and FET devices and their importance in circuit stability. CO2: Analyze the frequency response of BJT amplifiers using small-signal models. CO3: Compare different types of multistage and power amplifiers based on their performance. CO4: Identify the characteristics and effects of negative feedback in amplifier circuits. CO5: Design various oscillator circuits to meet given frequency specifications. CO6: Simulate analog circuits using PSPICE and evaluate their performance. TEXTBOOKS: 1. Jacob Millman, Christos C Halkias, Chetan D Parikh, Integrated Electronics: Analog and Digital Circuits and Systems, International Student Edition, Tata Mc Graw Hill, 2017. 2. Donald. A. Neamen, Electronic Circuits Analysis and Design, 3rd Edition, Mc Graw Hill Education (India) Private Ltd., 2010. REFERENCES: 1. Salivahanan, N.Suresh Kumar- Electronic Devices and Circuits, 5th Edition, Tata Mc Graw Hill Education (India) Private Ltd.,2022 2. Jacob Millman and Christos.C.Halkias – Electronic devices and circuits, Tata Mc Graw Hill, Electrical and Electronic Engineering series 2000. 3. Robert L. Boylestad and Louis Nasheresky, - Electronic Devices and Circuit Theory‖, 11th Edition, Pearson Education, 2008. LIST OF EQUIPMENT FOR A BATCH OF 30 STUDENTS S.No Equipment Quantity 1. CRO(30MHz) 15 2. Signal Generator/Function Generator(3MHz) 15 3. Dual Regulated Power Supply(0-30V) 15 4. Transistor-BC 107 60 5. Resistors,Capacitors (Depending on the design) 60 6. BreadBoards 15 7. Multimeter 3 8. Desktop with PSPICE Circuit Simulation Software 15 Design of BJT amplifier with Fixed bias Ex.No.1 Date: Aim: To design a fixed bias circuit and observe stability by changing β of the given transistor in CE configuration. Apparatus Required: Sl.No Name of the component Specification Quantity Required 1 Transistor BC 107 2 2 Resistor 3.3 KΩ, 520KΩ Each 1 3 Capacitor 1μF Each 1 4 Power Supply (0 – 30) V 1 5 Audio Frequency Oscillator (AFO) (0 – 3) MHz 1 6 Cathode Ray Oscilloscope (CRO) (0– 30) MHz 1 7 Bread Board 1 8 Connecting wires As required 9 Probe 2 THEORY An amplifier is used to increase the signal level; the amplifier is use to get a larger signal output from a small signal input The transistor can be used as a amplifier, if it is biased to operate in the active region, i.e. base-emitter junction is to be forward biased, while the base –collector junction to be reverse biased. Common-emitter amplifier is constructed using fixed bias circuit. The resistors RC and RB are biasing resistors. The input AC signal is given to the base of the transistor. The capacitors Ci and Co are coupling capacitors. The output is taken between the collector terminal and ground. CIRCUIT DIAGRAM DESIGN OF FIXED BIAS COMMON EMITTER AMPLIFIER Design parameters Vcc=12V, Ic =Ie=2mA, hfe (β) =100, Vbe =0.7V, VCE = 6V To find R c Apply KVL to collector loop Vcc-IcRc-Vce = 0 Rc = Vcc-Vce / Ic Rc = 12 - 6 / 4x10-3 Rc = 3 kΩ To find R B Apply KVL to base loop Vcc-IbRb-Vbe = 0 Rb = Vcc-Vbe / Ib Rb = 12 – 0.7 / 20x10-6 Rb = 565 kΩ To find Ci (Input capacitor) X Ci =RB || hie/10 X Ci = (565KΩ * 1.3 KΩ / 565KΩ +1.3 KΩ) / 10 X Ci = 129 XCi =1 / 2πfCi Let f=1000 Ci = 1 / 2π fX Ci Ci = 1 / 2*π *1000* 129 Ci = 1.2 μf use approx 1 μf To find CO (Output capacitor) Assume R L =4.7 K X CO =R C || R L / 10 RC =3 KΩ & RL = 4.7 KΩ X CO = (3KΩ * 4.7 KΩ / 3KΩ +4.7 KΩ) / 10 X CO = 183 X Ci =1 / 2πfC O Let f=1000 C O = 1 / 2π f X CO C O = 1 / 2*π *1000* 183 C O = 0.83 μf use approx 1 μf Tabular Column: V in = 50mV( p-p) Frequency (Hz) V 0 (Volts) Gain = V 0 / V in 𝐺𝑎𝑖𝑛 ( 𝑑𝐵 ) = 20 𝑙𝑜𝑔 ଵ 𝑉 ை 𝑉 Procedure: 1. Connect the circuit as per the circuit diagram. 2. Set V in = 1V in function generator. Keeping input voltage constant, vary the frequency from 1 Hz to 1 MHz in regular steps. 3. Note down the corresponding output voltage. 4. Calculate the gain (in dB) with the help of the readings taken. 5. Plot the graph between gain (in dB) Vs frequency in the semi-log graph. 6. Calculate the bandwidth from the graph and determine the Gain – Bandwidth product. Result: Hence designed and constructed the Common Emitter Amplifier using fixed bias and calculated the band width and cut-off frequency. Analysis of JFET with Voltage divider bias using PSPICE Aim: To analyze the JFET with voltage divider bias using OrCAD PSpice. Apparatus Required: Personal Computer OrCAD PSpice software Keyboard Mouse Theory: The configuration that can provide high bias stability is voltage divider bias. Instead of using a negative supply off of the emitter resistor, like two-supply emitter bias, this configuration returns the emitter resistor to ground and raises the base voltage. So as to avoid issues with a second power supply, this base voltage is derived from the collector power supply via a voltage divider. Ex.No.2 Date: Circuit Diagram : Simulation Profile: Output: Simulation Netlist R_R4 0 $N_0001 1k V_V1 $N_0002 10k 12v V_VGS $N_0003 0 0v R_R2 $N_0003 $N_0002 1M R_R3 0 $N_0003 470k R_R1 $N_0004 $N_0002 2.2k J_J2 $N_0004 $N_0003 $N_0001 JbreakN Procedure: 1) Open OrCAD capture student 2) Select file -> New -> Project 3) Give file name, and select Analog or Mixed A/D then select OK 4) Now select create blank project and select OK 5) Select “Place” to get all the circuit components 6) Connect the circuit as given in the circuit diagram 7) Assign values to all the components as given in the circuit diagram 8) Now select PSpice and then select New Simulation Profile 9) Give name to simulation and select create 10) In simulation setting select AC Sweep/Noise . 11) Assign value to start frequency, end frequency and Points/Decade and select Apply 12) Now select dB of voltage Level Marker and place it at the output terminal of a transistor. 13) Go to PSpice and select “run” to run the project 14) Frequency response plot is generated , note down the output. Model Graph Gain (dB) A max 3dB f L f H Bandwidth BW=f H -f L Frequency (Hz) Frequency (Hz) Result: The frequency response of BJT Cascade amplifier is obtained using OrCAD PSpice. CIRCUIT DIAGRAM: Model Graph Bandwidth BW=f H -f L CRO A V(max) 0.707 A V(max) 3dB f L f H Design and analysis of frequency response of Common emitter amplifier Aim: To design and construct BJT Common Emitter Amplifier using Voltage divider bias (self bias) with un by-passed emitter resistor. (i) Measurement of Gain (ii) Plot the frequency response & Determination of the Bandwidth Apparatus Required: Sl.No Name of the component Specification Quantity Required 1 Transistor BC 107 1 2 Resistor 22 K , 5.6 K 1.5 K , 3.9 K Each 1 3 Capacitor 0.1 F 2 100 F 1 4 Power Supply (0 – 30) V 1 5 Function Generator (0 – 3) MHz 1 6 Cathode Ray Oscilloscope (CRO) (0 – 30) MHz 1 7 Bread Board - 1 8 Connecting wires - As required Theory: Common Emitter amplifier has the emitter terminal as the common terminal between input and output terminals. The emitter base junction is forward biased and collector base junction is reverse biased, so that transistor remains in active region throughout the operation. When a sinusoidal AC signal is applied at input terminals of circuit during positive half cycle the forward bias of base emitter junction VBE is increased resulting in an increase in I B . The collector current Ic is increased by β times the increase in IB, VCE is correspondingly decreased. i.e output voltage gets decreased. Thus in a CE amplifier a positive going signal is converted into a negative going output signal i.e..180 o phase shift is introduced between output and input signal and it is an amplified version of input signal. Ex.No.3 Date: Common Emitter Amplifier Tabular Column: V in = 50 mV(p-p) Frequency (Hz) Output Voltage V 0 (Volt) Gain = V 0 / V in Gain(dB) = 20 log 10 V 0 V in Procedure: 1. Connect the circuit as per the circuit diagram. 2. Set V in = 50 mV in function generator. Keeping input voltage constant, vary the frequency from 1 Hz to 1 MHz in regular steps. 3. Note down the corresponding output voltage. 4. Calculate the gain (in dB) with the help of the readings taken. 5. Plot the graph between gain (in dB) vs frequency in the semi-log graph. 6. Calculate the bandwidth from the graph and determine the Gain – Bandwidth product. Design: (i) Choose V CC = 22 V, I C = 1mA, V BE = 0.7V (ii) Design of R C & R E : By applying KVL to output side, V CC – I C R C – V CE - I E R E = 0 Drop across R E (V RE ) is assumed to be 1V. Assume equal drops across R C & V CE V RC (i.e., I C R C ) = V CE ≤ V CC /2 = 11 V Let us assume V R C =5.5V R C 5.5 10 3 5.5 K Choose standard value of R C = 5.6 K V RE = I E .R E I C .R E R E V R E I C 1 V 1 mA 1 K Choose R E = 1 K (iii) Design of R 1 & R 2 : Drop across R 2 (V R2 ) = V BE + V RE = 0.7 V + 1V = 1.7 V Assume R 2 = 10 K V R 2 R 2 R 1 R 2 V CC 1.7 10 K R 1 10 K .12 R 1 60.5 K