CMOS CS – Output Resistance 1 The small-signal resistance seen looking into MOSFET drain, with gate and source at DC levels, is equal to r o to signal ground CMOS CS – Output Resistance 2 r o2 The small-signal resistance seen looking into MOSFET drain, with gate and source at DC levels, is equal to r o to signal ground From drain of Q 2 (output node) to signal ground CMOS CS – Output Resistance 3 r o1 The small-signal resistance seen looking into MOSFET drain, with gate and source at DC levels, is equal to r o to signal ground From drain of Q 1 (output node) to signal ground CMOS CS – Output Resistance 4 r o2 r o1 The small-signal resistance seen looking into MOSFET drain, with gate and source at DC levels, is equal to r o to signal ground From drain of Q 2 (output node) to signal ground From drain of Q 1 (output node) to signal ground CMOS CS – Output Resistance n R o = r o1 // r o2 5 r o2 r o1 The small-signal resistance seen looking into MOSFET drain, with gate and source at DC levels, is equal to r o to signal ground From drain of Q 2 (output node) to signal ground From drain of Q 1 (output node) to signal ground 6 ̈ Example: CMOS Common-Source Amp 7 ̈ Example: CMOS Common-Source Amp ! " ! " #A%&' EF "GG +,F -. +,F /GMM1O3M455MST8V:;< G=-F "GF /GF /GG + !! " # A % &" &# D" D# EF* + I I + + + + - μ μ μ = = = = = = = = = 8 ̈ Example: CMOS Common-Source Amp ! " ! " #A%&' EF "GG +,F -. +,F /GMM1O3M455MST8V:;< G=-F "GF /GF /GG + !! " # A % &" &# D" D# EF* + I I + + + + - μ μ μ = = = = = = = = = ̈ Find: ̈ Input and output resistances of amplifier ̈ Small-signal voltage gain v o /v i ̈ Limits of v o to keep Q 1 and Q 2 saturated 9 ̈ Solution: Neglect channel- length modulation in DC analyses. I D 1 = I D 2 = I REF = 100 μ A I D 1 = 100 μ A = 1 2 k n ' W L V OV 1 2 = 1 2 200 μ (10) V OV 1 2 ⇒ V OV 1 = 0.316V g m 1 = I D 1 1 2 V OV 1 = 100 μ 0.5 × 0.316V = 0.633 mA/V r o 1 = V An 1 2 k n ' W L V OV 1 2 = 20 100 μ = 200k r o 2 = V Ap 1 2 k p ' W L V OV 2 2 = 10 100 μ = 100k Output resistance: R o = r o 1 // r o 2 = 66.67K Voltage gain: A v = − g m 1 r o 1 // r o 2 ( ) = − 42.2 V/V Limits of output voltage swing: I REF = 100 μ A = 1 2 k p ' W L V SG − V tp ( ) 2 = 1 2 65 μ (10) V SG − 0.6 ( ) 2 ⇒ V SG = 1.155V ⇒ V OV 2 = 1.155 − 0.6 = 0.555V Q 2 enters SAT when: v O = V DD − V OV 2 = 3 − 0.555 = 2.445 V Q 1 enters SAT when: v O = V OV 1 = 0.316 V 10 ̈ Solution: Neglect channel- length modulation in DC analyses. I D 1 = I D 2 = I REF = 100 μ A I D 1 = 100 μ A = 1 2 k n ' W L V OV 1 2 = 1 2 200 μ (10) V OV 1 2 ⇒ V OV 1 = 0.316V g m 1 = I D 1 1 2 V OV 1 = 100 μ 0.5 × 0.316V = 0.633 mA/V r o 1 = V An 1 2 k n ' W L V OV 1 2 = 20 100 μ = 200k r o 2 = V Ap 1 2 k p ' W L V OV 2 2 = 10 100 μ = 100k Output resistance: R o = r o 1 // r o 2 = 66.67K Voltage gain: A v = − g m 1 r o 1 // r o 2 ( ) = − 42.2 V/V Limits of output voltage swing: I REF = 100 μ A = 1 2 k p ' W L V SG − V tp ( ) 2 = 1 2 65 μ (10) V SG − 0.6 ( ) 2 ⇒ V SG = 1.155V ⇒ V OV 2 = 1.155 − 0.6 = 0.555V Q 2 enters SAT when: v O = V DD − V OV 2 = 3 − 0.555 = 2.445 V Q 1 enters SAT when: v O = V OV 1 = 0.316 V 11 ̈ Solution: Neglect channel- length modulation in DC analyses. I D 1 = I D 2 = I REF = 100 μ A I D 1 = 100 μ A = 1 2 k n ' W L V OV 1 2 = 1 2 200 μ (10) V OV 1 2 ⇒ V OV 1 = 0.316V g m 1 = I D 1 1 2 V OV 1 = 100 μ 0.5 × 0.316V = 0.633 mA/V r o 1 = V An 1 2 k n ' W L V OV 1 2 = 20 100 μ = 200k r o 2 = V Ap 1 2 k p ' W L V OV 2 2 = 10 100 μ = 100k Output resistance: R o = r o 1 // r o 2 = 66.67K Voltage gain: A v = − g m 1 r o 1 // r o 2 ( ) = − 42.2 V/V Limits of output voltage swing: I REF = 100 μ A = 1 2 k p ' W L V SG − V tp ( ) 2 = 1 2 65 μ (10) V SG − 0.6 ( ) 2 ⇒ V SG = 1.155V ⇒ V OV 2 = 1.155 − 0.6 = 0.555V Q 2 enters SAT when: v O = V DD − V OV 2 = 3 − 0.555 = 2.445 V Q 1 enters SAT when: v O = V OV 1 = 0.316 V 12 ̈ Solution: Neglect channel- length modulation in DC analyses. I D 1 = I D 2 = I REF = 100 μ A I D 1 = 100 μ A = 1 2 k n ' W L V OV 1 2 = 1 2 200 μ (10) V OV 1 2 ⇒ V OV 1 = 0.316V g m 1 = I D 1 1 2 V OV 1 = 100 μ 0.5 × 0.316V = 0.633 mA/V r o 1 = V An 1 2 k n ' W L V OV 1 2 = 20 100 μ = 200k r o 2 = V Ap 1 2 k p ' W L V OV 2 2 = 10 100 μ = 100k Output resistance: R o = r o 1 // r o 2 = 66.67K Voltage gain: A v = − g m 1 r o 1 // r o 2 ( ) = − 42.2 V/V Limits of output voltage swing: I REF = 100 μ A = 1 2 k p ' W L V SG − V tp ( ) 2 = 1 2 65 μ (10) V SG − 0.6 ( ) 2 ⇒ V SG = 1.155V ⇒ V OV 2 = 1.155 − 0.6 = 0.555V Q 2 enters SAT when: v O = V DD − V OV 2 = 3 − 0.555 = 2.445 V Q 1 enters SAT when: v O = V OV 1 = 0.316 V 13 ̈ Solution: Neglect channel- length modulation in DC analyses. I D 1 = I D 2 = I REF = 100 μ A I D 1 = 100 μ A = 1 2 k n ' W L V OV 1 2 = 1 2 200 μ (10) V OV 1 2 ⇒ V OV 1 = 0.316V g m 1 = I D 1 1 2 V OV 1 = 100 μ 0.5 × 0.316V = 0.633 mA/V r o 1 = V An 1 2 k n ' W L V OV 1 2 = 20 100 μ = 200k r o 2 = V Ap 1 2 k p ' W L V OV 2 2 = 10 100 μ = 100k Output resistance: R o = r o 1 // r o 2 = 66.67K Voltage gain: A v = − g m 1 r o 1 // r o 2 ( ) = − 42.2 V/V Limits of output voltage swing: I REF = 100 μ A = 1 2 k p ' W L V SG − V tp ( ) 2 = 1 2 65 μ (10) V SG − 0.6 ( ) 2 ⇒ V SG = 1.155V ⇒ V OV 2 = 1.155 − 0.6 = 0.555V Q 2 enters SAT when: v O = V DD − V OV 2 = 3 − 0.555 = 2.445 V Q 1 enters SAT when: v O = V OV 1 = 0.316 V 14 ̈ Solution: Neglect channel- length modulation in DC analyses. I D 1 = I D 2 = I REF = 100 μ A I D 1 = 100 μ A = 1 2 k n ' W L V OV 1 2 = 1 2 200 μ (10) V OV 1 2 ⇒ V OV 1 = 0.316V g m 1 = I D 1 1 2 V OV 1 = 100 μ 0.5 × 0.316V = 0.633 mA/V r o 1 = V An 1 2 k n ' W L V OV 1 2 = 20 100 μ = 200k r o 2 = V Ap 1 2 k p ' W L V OV 2 2 = 10 100 μ = 100k Output resistance: R o = r o 1 // r o 2 = 66.67K Voltage gain: A v = − g m 1 r o 1 // r o 2 ( ) = − 42.2 V/V Limits of output voltage swing: I REF = 100 μ A = 1 2 k p ' W L V SG − V tp ( ) 2 = 1 2 65 μ (10) V SG − 0.6 ( ) 2 ⇒ V SG = 1.155V ⇒ V OV 2 = 1.155 − 0.6 = 0.555V Q 2 enters SAT when: v O = V DD − V OV 2 = 3 − 0.555 = 2.445 V Q 1 enters SAT when: v O = V OV 1 = 0.316 V 15 ̈ Solution: Neglect channel- length modulation in DC analyses. I D 1 = I D 2 = I REF = 100 μ A I D 1 = 100 μ A = 1 2 k n ' W L V OV 1 2 = 1 2 200 μ (10) V OV 1 2 ⇒ V OV 1 = 0.316V g m 1 = I D 1 1 2 V OV 1 = 100 μ 0.5 × 0.316V = 0.633 mA/V r o 1 = V An 1 2 k n ' W L V OV 1 2 = 20 100 μ = 200k r o 2 = V Ap 1 2 k p ' W L V OV 2 2 = 10 100 μ = 100k Output resistance: R o = r o 1 // r o 2 = 66.67K Voltage gain: A v = − g m 1 r o 1 // r o 2 ( ) = − 42.2 V/V Limits of output voltage swing: I REF = 100 μ A = 1 2 k p ' W L V SG − V tp ( ) 2 = 1 2 65 μ (10) V SG − 0.6 ( ) 2 ⇒ V SG = 1.155V ⇒ V OV 2 = 1.155 − 0.6 = 0.555V Q 2 enters SAT when: v O = V DD − V OV 2 = 3 − 0.555 = 2.445 V Q 1 enters SAT when: v O = V OV 1 = 0.316 V 16 ̈ Solution: Neglect channel- length modulation in DC analyses. I D 1 = I D 2 = I REF = 100 μ A I D 1 = 100 μ A = 1 2 k n ' W L V OV 1 2 = 1 2 200 μ (10) V OV 1 2 ⇒ V OV 1 = 0.316V g m 1 = I D 1 1 2 V OV 1 = 100 μ 0.5 × 0.316V = 0.633 mA/V r o 1 = V An 1 2 k n ' W L V OV 1 2 = 20 100 μ = 200k r o 2 = V Ap 1 2 k p ' W L V OV 2 2 = 10 100 μ = 100k Output resistance: R o = r o 1 // r o 2 = 66.67K Voltage gain: A v = − g m 1 r o 1 // r o 2 ( ) = − 42.2 V/V Limits of output voltage swing: I REF = 100 μ A = 1 2 k p ' W L V SG − V tp ( ) 2 = 1 2 65 μ (10) V SG − 0.6 ( ) 2 ⇒ V SG = 1.155V ⇒ V OV 2 = 1.155 − 0.6 = 0.555V Q 2 enters SAT when: v O = V DD − V OV 2 = 3 − 0.555 = 2.445 V Q 1 enters SAT when: v O = V OV 1 = 0.316 V 17 ̈ Solution: Neglect channel- length modulation in DC analyses. I D 1 = I D 2 = I REF = 100 μ A I D 1 = 100 μ A = 1 2 k n ' W L V OV 1 2 = 1 2 200 μ (10) V OV 1 2 ⇒ V OV 1 = 0.316V g m 1 = I D 1 1 2 V OV 1 = 100 μ 0.5 × 0.316V = 0.633 mA/V r o 1 = V An 1 2 k n ' W L V OV 1 2 = 20 100 μ = 200k r o 2 = V Ap 1 2 k p ' W L V OV 2 2 = 10 100 μ = 100k Output resistance: R o = r o 1 // r o 2 = 66.67K Voltage gain: A v = − g m 1 r o 1 // r o 2 ( ) = − 42.2 V/V Limits of output voltage swing: I REF = 100 μ A = 1 2 k p ' W L V SG − V tp ( ) 2 = 1 2 65 μ (10) V SG − 0.6 ( ) 2 ⇒ V SG = 1.155V ⇒ V OV 2 = 1.155 − 0.6 = 0.555V Q 2 enters SAT when: v O = V DD − V OV 2 = 3 − 0.555 = 2.445 V Q 1 enters SAT when: v O = V OV 1 = 0.316 V 18 ̈ Solution: Neglect channel- length modulation in DC analyses. I D 1 = I D 2 = I REF = 100 μ A I D 1 = 100 μ A = 1 2 k n ' W L V OV 1 2 = 1 2 200 μ (10) V OV 1 2 ⇒ V OV 1 = 0.316V g m 1 = I D 1 1 2 V OV 1 = 100 μ 0.5 × 0.316V = 0.633 mA/V r o 1 = V An 1 2 k n ' W L V OV 1 2 = 20 100 μ = 200k r o 2 = V Ap 1 2 k p ' W L V OV 2 2 = 10 100 μ = 100k Output resistance: R o = r o 1 // r o 2 = 66.67K Voltage gain: A v = − g m 1 r o 1 // r o 2 ( ) = − 42.2 V/V Limits of output voltage swing: I REF = 100 μ A = 1 2 k p ' W L V SG − V tp ( ) 2 = 1 2 65 μ (10) V SG − 0.6 ( ) 2 ⇒ V SG = 1.155V ⇒ V OV 2 = 1.155 − 0.6 = 0.555V Q 2 enters SAT when: v O = V DD − V OV 2 = 3 − 0.555 = 2.445 V Q 1 enters SAT when: v O = V OV 1 = 0.316 V 19 ̈ Solution: Neglect channel- length modulation in DC analyses. I D 1 = I D 2 = I REF = 100 μ A I D 1 = 100 μ A = 1 2 k n ' W L V OV 1 2 = 1 2 200 μ (10) V OV 1 2 ⇒ V OV 1 = 0.316V g m 1 = I D 1 1 2 V OV 1 = 100 μ 0.5 × 0.316V = 0.633 mA/V r o 1 = V An 1 2 k n ' W L V OV 1 2 = 20 100 μ = 200k r o 2 = V Ap 1 2 k p ' W L V OV 2 2 = 10 100 μ = 100k Output resistance: R o = r o 1 // r o 2 = 66.67K Voltage gain: A v = − g m 1 r o 1 // r o 2 ( ) = − 42.2 V/V Limits of output voltage swing: I REF = 100 μ A = 1 2 k p ' W L V SG − V tp ( ) 2 = 1 2 65 μ (10) V SG − 0.6 ( ) 2 ⇒ V SG = 1.155V ⇒ V OV 2 = 1.155 − 0.6 = 0.555V Q 2 enters SAT when: v O = V DD − V OV 2 = 3 − 0.555 = 2.445 V Q 1 enters SAT when: v O = V OV 1 = 0.316 V 20 ̈ Solution: Neglect channel- length modulation in DC analyses.