School of Chemical and Biomedical Engineering CH2104: Heat and Mass Transfer Ion Implantation Techniques for Semiconductor Doping: a S hort Literature R eview Mehta Prasham Paras U2023615B Introduction: According to Moore’s Law, the number of transistors in an Integrated Circuit doubles every two years. Moore’s Law has established an empirical relationship that has been guiding the development of the semiconductor industry over the last 50 years [1] Advancement of the computer hardware industry is largely dependent on its ability to keep up with Moore’s law. [2] The infographic below shows how Moore’s law has made accurate predictions regarding the transistor count on a microchip. Figure 1. Moore’s Law [3] Therefore, it is well established that constant development in the semiconduct or chip fabrication industry is crucial for advancement of computer hardware. The semiconductor industry as of 2022 is worth over $500 billion. [4] The semiconductor manufacturing process involves multiple steps from the cleaning of the silicon wafers to t he assembly. Doping of semiconductors is an important leg of the manufacturing process. The focus of this review paper is to understand and appreciate one of the methods of doping in semiconductors. The primary focus of the review is to form a detailed stu dy of the Ion implantation technique that will be discussed in the further sections. Doping is the process of introducing impurity atoms in a silicon wafer in a controllable manner to define the electrical, optical, and structural properties of this regio n. Silicon wafer has no free holes or electrons in its pure state. Doping of silicon using III or V group atoms, (and others) helps produce positive or negative junctions within the semiconductor that allows for the electrical conduction in the circuit. [5 ] Briefly, there are two general methods of doping atoms into the semiconductor lattice, namely, diffusion and ion implantation. These methods have been identified since decades and has been constantly improved and optimized to meet the ever - increasing de mands of the semiconductor industry. [4] Diffusion in semiconductors can be explained as a series of movement of dopant into the crystal lattice of the semiconductor. This process is governed by Fick’s laws of diffusion which can be briefly explained with the following two equations. [6] 𝐹 = − 𝐷 𝜕𝐶 𝜕𝑥 𝜕𝐶 𝜕𝑡 = 𝐷 𝜕 2 𝐶 𝜕 𝑥 2 D iffusion has not been discussed in detail in this review paper. We attempt to rather go in dept h of ion implantation method. We first understand the underlying principles involved in the process. Different ion implantation methods and capabilities are elucidated, followed by the historical perspective on the development of ion implantation and the v arious changes with time have been explored. Lastly, the importance of ion implantation and its comparison with other methods like diffusion is studied. Ion Implantation Background: An approach for introducing doping atoms into a semiconductor wafer to produce devices and integrated circuits is ion implantation. Ionized dopants are accelerated to high energies by electric fields and fired into the wafer in this low - temperature technique. The accuracy with which the amount and position of the doping may be adjusted is the fundamental justification for using this approach. [4] Ion implantation is a batch process that takes 2 to 10 hours to complete. Most other traditional surface treatments are far less reproducible and controlled than this pro cedure. The component surface does not require any additional treatment prior to usage after ion implantation. [7] As seen in Figure below, the range of energy and beam currents necessary for semiconductor manufacture has grown astonishingly diversified. When implantation was originally used to dope semi - conductors, it was not anticipated that such a wide variety of capabilities would be required. There is no one machine design that can span this complete spectrum, and as new uses have emerged, multiple di stinct types of implanters have evolved [8] Figure 2: Dosage and Energy of different doped silicon wafers Working Principle: Ions are generated by utilizing extensive electric field to strip away electrons. These ions are filtered and accelerated towards a semiconductor wafer to cause collisions. The high energy collision causes the ions to be embedded in the matrix of the targe t. Ions having different accelerating energy travel different depth within the semiconductor. Figure below shows the qualitative doping profile achieved via ion implantation [9] : Figure 3. Doping profile achieved via Ion Implantation The total number of ions to be embedded in the matrix, also known as the dose, is carefully controlled by using the mathematical governing expressions. The dose can be accurately calculated by finding the integration of the measured ion current with respect to tim e. Mathematically, 𝑄 𝑇 = 1 𝑞 ( 𝑎𝑟𝑒𝑎 ) ∫ 𝐼 𝑑𝑡 At each impact, the ion loses some energy. The distance travelled (R p ) by the ion before s topping can be measured using statistical methods to evaluate the loss of energy due to electronic and nuclear interacti ons of the ions. [11] R P is given by, 𝑅 𝑝 = ∫ 𝑑𝑥 𝑅 0 = 1 𝑁 ∫ 𝑑𝐸 𝑆 𝑛 ( 𝐸 ) + 𝑆 𝑒 ( 𝐸 ) 𝐸 0 0 Similarly, the composition profile for the impurity concentration of the doped semiconductor can be obtained by approximating a Gaussian dependent on the projected range calculate d above. The expression governing the concentration change with x is given by, 𝐶 ( 𝑥 ) = 𝐶 𝑝 𝑒𝑥𝑝 ( − ( 𝑥 − 𝑅 𝑝 ) 2 2 ∆ 𝑅 𝑝 2 ) Here, C p is the peak concentration of the doped impurities, while R p is the range traversed by the ion stopping. ∆ 𝑅 𝑝 refers to the standard deviation (vertical straggle) of the projected vertical range. The range of energy employed for ion implantation ranges from 100 eV to 10 MeV while the dose ranges from 10 10 to over 10 18 ions/cm2 . These can be used for preparing s ilicon wafers for integrated circuits and photovoltaic devices. [12] The ion source, mass analyzer, accelerating column, two - dimensional scanning system, and wafer chamber are the fundamental units of an ion implantation machine. The design of the machine components is determined by the expected performance of the implanter and its unique doping requirements, which include implanted flux, beam current, and power density. The figure given below is a simplified design of a standard implanter. [13] Figure 4. Simplified design of standard implanter Besides the working of an ion implanter, the method has some striking advantages over other doping methods such as diffusion. Ion implantation ensures precise control of the dose along with the independent control of impurity depth. It is a faster process that can produce a moderately dosed 12 - inch plate under 30 seconds. The existence of multi energy process allows for the creation of complex profiles within the semiconductor wafer. For example, ion implant ation can be used to form retrograde profiles that form peak at points on the inside of the wafer rather than on the surface. [12] Types of Implanter Machine s : Implanters can be classified into two broad categories, namely medium current and high curren t machines. The classification is based on the ability to handle the power in the beam differently for each. Most implantation machines operate in the ion energy regime whose energy range lies between a fraction of a keV to 200 keV. However, recently devel oped MeV ion implanters enable higher energies than the typical ion implantation system. Another recent addition to the ion implantation tool set is the plasma immersion ion implantation system. Instead of using traditional DC acceleration, plasma immersio n ion implanters immerse the target in a plasma of the dopant, and a high energy pulse to the target draws the dopant to it. [14] The properties and functionalities of different types of implanters available in the commercial marketplace are tabulated below. Type of Implanter Energy & Current Ranges Special Features Prominent Manufacturers Medium Current Implanters 10 – 200 keV ~2 00 - 300 A Single wafer processing used. Axcelis Technologies Incorporated, Nissin Ion Equipment Company, SEN Corporation High Current Implanters 10 - 160 keV 10 mA High Power deposition Advanced Ion beam Technology, Axcelis Technologies Inc, Applied Materials. Plasma Immersion Ion Implanters Few eV – 10 keV utility in the materials modification market and low doping energy processes for ICs. Applied Materials, Ion Beam Services, Nissin Ion Equipment Company MeV Implante rs Few MeVs MeV implanters have more complex acceleration schemes Axcelis Technologies Incorporated, SEN Corporation, NEC Corporation Table 1. Description of Various Types of Ion Implanters Available Commercially Historical Perspective: Over the last few decades, the use of ion implantation has changed for the better. Smaller microchips with more transistors are demanded according to the Moore’s Law. To achieve reasonable progress every year, it is important to appreciate the improvements in semic onductor doping as it serves as an important step during the manufacturing process. The infographic provided below gives a history of the development of ion implanted wafers and the different manufacturing companies that make them. [15] Figure 5. Timeline of progress of Ion Implantation B asic fea tures of an ion implanter for doping semiconductors and the need to anneal the implant were patented by Shockley in 1952. By the next decade, this breakthrough technology was commercialized. The initial applications were medium energy with low dosage that were still using the rudimentary features consistent with Shockley’s patent. [ 16] The 1970’s saw a period of rapid wafer size change due to the physics involved in ion implantation. As for the high current implantation, diffusion performed better in terms of throughput and uniformity until the new developments at Western Electric and Be ll Laboratories in the mid 1970s. [17] For example, the introduction of abrupt activated Arsenic profiles using low energy implants followed by a high temperature drive in cycle permitted the reduction of the impact energies. [18] IBM launched their own hi gh current machine in 1973 which was a game changer as it brought the equipment supplier and the end user under the same roof. In 1980s, Nissin developed ion implanters that could facilitate higher tilt angles and variable twist in their manufacturing p rocess. The new machines also attempted to reduce the variation across the wafer caused by channelling issues. [15] ASMI on the other hand, incorporated continuously variable wafer tilt up to 60° and in - situ step - wise variable wafer twist that extended the scanning arrangement to accommodate 200 mm wafers. [15] The next decade was focused towards IC miniaturization This was realized by a variety of technologies, such as high precision repeatable control for dose uniformity and implant angle, elimination o f device damage caused by the charge - up during implantation, filter - out of various types of contamination, generation of new ion beams, and patterning implantation to compensate the variation of transistor characteristics across the wafer. [19] Currently, newer methods of ion implantations have been developed and used by different manufacturing companies to ensure an increased output and technological leap s Plasma immersion is a conceptually attractive way to avoid the beam current limit imposed upon a co nventional beam line implanter by space charge. [20] The wafer is submerged in a plasma containing dopant gases and pulsed to a negative voltage while the plasma stays near to the potential of the vacuum chamber walls in this approach. Positive ions from t he plasma are accelerated to dope the wafer by the electric field formed between the plasma and the wafer. During the negative voltage pulse, the plasma border recedes, allowing positive ions to continue to flow. [21] Gas clusters are now being used for ob taining very high doping rates while large molecular ions have been employed to generate high effective currents. Challenges: Although Ion implantation has many advantages in over diffusion in terms of flexibility and control over dopant concentration and depth, the manufacturing process is faced with many challenges that have bothered the industry since a long time. Companies co nstantly try to mitigate these effects and improve the results from ion implantation semiconductor doping. For low energy ion implantation, the effect of channeling on ion implantation becomes a serious issue. With decreasing energy, the critical angle f or axial and planar channeling rises. This correlates to a higher chance of channeling with a lower ion energy. To minimize channeling, the industry recommends a 7° tilt angle between the ion implantation direction and the surface normal. [22] After ion i mplantation, the wafer is generally so heavily damaged that the electrical behavior is dominated by deep - level electron and hole traps that capture carriers and raise the resistance. Annealing is essential to repair lattice damage and place dopant atoms on substitutional sites. The proportion of dopant that is electrically active, as determined experimentally using the Hall effect approach, is frequently used to measure the effectiveness of annealing. [15] However, not all the damage can be corrected by ann ealing. Moreover, Ion implantation tools continue to be increasingly complex in terms of their operation. They need to be in the cleanest and most controlled environment possible which makes the scalability of manufacturing difficult and expensive. [23] The process also remains heavily sensitive to the incident ion beam energy and the angle of incidence. Efforts to reduce the effects of beam divergence includes the introduction of dense local plasmas at critical points in the beam path. [24] Ion implant ation is more expensive than other methods of doping such as diffusion. With increasing demand for silicon wafers, it is crucial to reduce the cost of production. The high cost of setting up, along with the need to maintain high standards of quality while doping via ion implantations pose a serious challenge for the industry. Conclusion and Future Scope: In this review, we understand the basic principles of ion implantation process used for doping semiconductors. Since the last few years, the silicon ind ustry has not been able to keep up with the Moore’s law. This has created concern amongst many . In the coming decade, silicon microchip manufacturing is going to be one of the most crucial industries, and therefore there is a lot of burden on different par ts of the process to constantly improve. Ion implantation will remain the primary mass transfer method by which silicon wafers are doped in the future . This review hopes to enlighten the importance of this process and explore its underlying principles T he review also aims to highlight the journey of development of this technique over the last half century and point out the key challenges faced by the industry References: [1] Moore, G., 1965. Cramming more components onto integrated circuits [online] Newsroom.intel.com. [2] The Impact of Moore’s Law Ending. (2018, October 29). Semiconductor Engineering. https://semiengineering.com/the - impact - of - moores - law ending/ [3] Roser, M., & Ritchie, H. (2013). Technological Change. Our World in Data. https://ourworldindata.org/technological - change [4] 2. Semiconductor Doping Technology. (n.d.). Www.iue.tuwien.ac.at. https://www.iue.tuwien.ac.at/phd/wittmann/node7.html [5] Chapter 8: Diffusion. (n.d.). http://www.cityu.edu.hk/phy/appkchu/AP6120/8.PDF [6] Incropera’s Principles of Heat and Mass Transfer, 8th Edition, Global Edition | Wiley. (n.d.). Wiley.com. [7] What is ion implantation? (n.d.). Www.twi - Global.com. Retrieved April 18, 2022, from http s://www.twi - global.com/technical - knowledge/faqs/faq - what - is - ion - implantation [8] Rose, P. H., & Ryding, G. (2006). Concepts and designs of ion implantation equipment for semiconductor processing. Review of Scientific Instruments, 77(11), 111101. https://doi.org/10.1063/1.2354571 [11] Campbell, Stephen A., and Stephen A. Campbell. “5.” Fabrication Engineering at the Micro and Nanoscale, Oxford University Press, New York, 2013. [12 ] Chu, P., n.d. Chapter 9: Ion Implantation . Hong Kong: City University of Hong Kong. [13] El - Kareh, B., 1995. Ion Implantation. Fundamentals of Semiconductor Processing Technology , pp.353 - 466. [14] Conrad, J., Radtke, J., Dodd, R., Worzala, F. and Tran, N., 1987. Plasma source ion ‐ implantation technique for surface modification of materials. Journal of Applied Physics , 62(11), pp.4591 - 4596. [15] McKenna, C., n.d. A personal historical perspective of ion implantation equipment for semiconductor applications. 2000 International Conference on Ion Implantation Technology Proceedings. Ion Implantation Technology - 2000 (Cat. No.00EX432) ,. [16] Shockley, W., 1957. U.S. Patent No. 2,787,564 ( 1957). [17] H. Wollnik, "Applied Charged Particle Optics B" in Mass Spectrographs and Isotope Separators, New York:Academic Press, 1980. [18] S. DiNaro , R. Hertel and N. Turner, Ion Implantation Equipment and Techniques, Berlin:Springer, vol. 11, pp. 114, 1982. [19] TANJYO, M. and NAITO, M., n.d. History of Ion Implanter and Its Future Perspective. [20] Rose, P. and Ryding, G., 2006. Concepts and designs of ion implantation equipment for semiconductor processing. Review of Scientific Instruments , 77(11), p.111101. [21] I. Yamada, J. Matsuo, N. Toyoda, and A. Kirkpatrick, Mater. Sci. Eng., R. 34 , 231 2001 [22] Cho, K., Allen, W., Finstad, T., Chu, W., Liu, J. and Wortman, J., 1985. Channelling effect for low energy ion implantation in Si. Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms , 7 - 8, pp.265 - 272. [23] Hattori, T., 2011. Ultraclean surface processing of silicon wafers . Berlin: Springer. [24] T. N. Horsky et al., Beam angular divergence effects in ion implantation, in Proc. Int. Conf. Ion Implantation Technology (2008), pp. 403 – 406.